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DISCRETE SEMICONDUCTORS
DATA SHEET
BSP304; BSP304A P-channel enhancement mode vertical D-MOS transistors
Product specification File under Discrete Semiconductors, SC07 1995 Apr 07
Philips Semiconductors
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistors
FEATURES * Direct interface to C-MOS, TTL etc. * High speed switching * No secondary breakdown. APPLICATIONS * Intended for use as a Line current interruptor in telephone sets and for applications in relay, high speed and line transformer drivers. PINNING - TO-92 variant
handbook, halfpage
BSP304; BSP304A
DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a TO-92 variant package.
d
1
2 3 g
MAM144
s
PIN BSP304 1 2 3 BSP304A 1 2 3
SYMBOL
DESCRIPTION
g d s
gate drain source CAUTION Fig.1 Simplified outline and symbol.
s g d
source gate drain
The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling.
QUICK REFERENCE DATA SYMBOL VDS VGSO VGSth ID RDSon Ptot PARAMETER drain-source voltage (DC) gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation ID = -170 mA; VGS = -10 V up to Tamb = 25 C open drain ID = -1 mA; VDS = VGS CONDITIONS - - -1.7 - - - MIN. MAX. -300 20 -2.55 -170 17 1 V V V mA W UNIT
1995 Apr 07
2
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistors
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS VGSO ID IDM Ptot Tstg Tj PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature operating junction temperature up to Tamb = 25 C; note 1 open drain CONDITIONS
BSP304; BSP304A
MIN. - - - - - -65 -
MAX. -300 20 -170 -0.75 1 +150 150 V V
UNIT
mA A W C C
THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient note 1 CONDITIONS VALUE 125 UNIT K/W
Note to the "Limiting values" and "Thermal characteristics" 1. Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for drain lead minimum 1 cm2. CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL V(BR)DSS VGSth IDSS IGSS RDSon yfs Ciss Coss Crss ton toff PARAMETER drain-source breakdown voltage gate-source threshold voltage drain-source leakage current gate leakage current drain-source on-state resistance forward transfer admittance input capacitance output capacitance reverse transfer capacitance CONDITIONS VGS = 0; ID = -10 A VDS = VGS ; ID = -1 mA VGS = 0; VDS = -240 V VGS = 20 V; VDS = 0 VGS = -10 V; ID = -170 mA VDS = -25 V; ID = -170 mA MIN. -300 -1.7 - - - 100 TYP. - - - - - - 60 15 5 MAX. - -2.55 -100 100 17 - 90 30 15 UNIT V V nA nA mS pF pF pF
VGS = 0; VDS = -25 V; f = 1 MHz - VGS = 0; VDS = -25 V; f = 1 MHz - VGS = 0; VDS = -20 V; f = 1 MHz - VGS = 0 to -10 V; VDD = -50 V; ID = -250 mA VGS = -10 to 0 V; VDD = -50 V; ID = -250 mA - -
Switching times (see Figs 2 and 3) turn-on time turn-off time 5 15 10 30 ns ns
1995 Apr 07
3
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistors
BSP304; BSP304A
handbook, halfpage
VDD = 50 V
handbook, halfpage
10 %
INPUT 90 % ID OUTPUT 90 % t on t off
0 10 V 50
10 %
MBB689
MBB690
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
handbook, halfpage
1.2
MLC697
handbook, halfpage
1
MLC699
P tot (W) 0.8
ID (A)
(1)
tp = 10 s 100 s 1 ms 10 ms
10
1
100 ms 0.4 10
2
P
= T
tp 1s DC
tp T 0 0 50 100 150 200 o T amb ( C) 10
3
t
1
10
10 2
V
DS
(V)
10 3
= 0.01. Tamb = 25 C. (1) RDSon limitation.
Fig.4 Power derating curve.
Fig.5 DC SOAR.
1995 Apr 07
4
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistors
BSP304; BSP304A
MLC688
handbook, halfpage
100
MLD139
handbook, halfpage
800
C (pF) 80
ID (mA) 600 P=1W
V GS = 10 V 7V 6V 5V
60
C iss
400
40
4V 200
20
Coss C rss 0 10 20 V DS (V) 30
0 0 2 4 6 8
3.5 V 3V 10 12 V DS (V)
0
VGS = 0. Tj = 25 C. f = 1 MHz. Tj = 25 C.
Fig.6
Capacitance as a function of drain source voltage; typical values.
Fig.7 Typical output characteristics.
MLC689
MLC691
handbook, halfpage
800
handbook, halfpage
80
ID (mA) 600
R DSon () 60
400
40
200
20
0 0 2 4 6 8 10 V GS (V)
0 0 2 4 6 8 VGS (V) 10
VDS = -25 V. Tj = 25 C.
ID = -170 mA. Tj = 25 C.
Fig.9 Fig.8 Typical transfer characteristics.
Drain-source on-state resistance as a function of gate-source voltage; typical values.
1995 Apr 07
5
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistors
BSP304; BSP304A
handbook, halfpage R
60 DSon () 50
MLC692
handbook, halfpage
1.1
MLC696
VGS = 3 V
4V
5V
k
40
1.0
30
6V 0.9 7V 10 V
20
10
0
1
10
102
I D (mA)
10 3
0.8 50 0 50 100 T j ( C) V GSth at T j k = ------------------------------------V GSth at 25C
o
150
Tj = 25 C.
Typical VGSth at ID = -1 mA; VDS =VGS.
Fig.10 Drain-source on-state resistance as a function of drain current; typical values.
Fig.11 Temperature coefficient of gate-source threshold voltage.
handbook, halfpage
2.5
MLC695
k 2
1.5
1
0.5
0 50 0 50 100 T j ( C)
o
150
R DSon at T j k = ---------------------------------------R DSon at 25 C Typical RDSon at ID = -170 mA; VGS = -10 V.
Fig.12 Temperature coefficient of drain-source on-state resistance.
1995 Apr 07
6
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistors
BSP304; BSP304A
3 10 handbook, full pagewidth
MLC698
R th j-a (K/W) 10
2
= 0.75 0.5 0.2
10
0.1 0.05 0.02 0.01 P
1 0 tp T 10
1
= T
tp
t
10
5
10
4
10
3
10
2
10
1
1
10
10
2
t p (s)
10 3
Tamb = 25 C.
Fig.13 Transient thermal resistance from junction to ambient as a function of pulse time; typical values.
1995 Apr 07
7
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistors
PACKAGE OUTLINE
BSP304; BSP304A
handbook, full pagewidth
0.40 min
4.2 max 1.6 1 4.8 max 2.54 3 2 5.2 max 12.7 min 0.48 0.40
0.66 0.56 2.5 max
(1)
MBC015 - 1
Dimensions in mm. (1) Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
Fig.14 TO-92 variant.
1995 Apr 07
8
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistors
DEFINITIONS Data Sheet Status Objective specification Preliminary specification Product specification Limiting values
BSP304; BSP304A
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1995 Apr 07
9

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